Frequency-domain decision feedback equalizing device and method

ABSTRACT

A fast Fourier transformation is performed on a first vector of signals, and as a result a second vector of signals is provided. A feed forward equalization is performed by multiplying each of the components of said second vector with equalization parameters, and as a result a third vector of signals is provided. An inverse fast Fourier transformation is performed on said third vector, and as a result a fourth vector of signals is provided. An output signal of said first section is provided on the basis of said fourth vector of signals. In a second section a signal derived from an output signal of said second section is is filtered via linear feedback filtering and the filtered signal is added to said first section output signal, and an added signal is provided, and said second section output signal is generated by extracting samples from said added signal.

The present invention relates to a frequency-domain decision feedbackequalizer device for single carrier modulation, preferably for use in abroadband communication system. Further, the present invention relatesto a receiver and a transmitter of a communication system using a singlecarrier modulation as well as to a communication system including such atransmitter and such a receiver. Moreover, the present invention relatesto a frequency-domain decision feedback equalizing method for singlecarrier modulation, preferably for use in a broadband communicationsystem. Finally, the present invention relates to a method fortransmitting data using a single carrier modulation.

Such apparatuses, method and system are preferably used in wired andwireless transmission systems like xDSL, DAB and DVB.

U.S. Pat. No. 6,052,702 A discloses a decision feedback filter devicecomprising a forward filter and a feedback filter for the production,from input symbols, of the corresponding decisions. The forward filter(FF) receives the input symbols and the feedback filter receives thedecisions. The forward filter carries out a frequency domain filteringof blocks of M input symbols, and the feedback filter carries out afrequency domain filtering of blocks of L decisions, with L being lowerthan M. The feedback filter permits the intersymbol interference causedby the reception of echoes to be rectified.

U.S. Pat. No. 6,148,024 A describes a system and a method fortransmitting coded information bits using multitone techniques on aframe-by-frame basis. For transmission, coded information bits aremapped into differential phase signals and absolute phase signals aregenerated based on differential phase signals. N complex symbols arethen generated and inverse discrete Fourier transformed into N complex,time-domain samples, which are augmented with a cyclic prefix andsuffix. The augmented N complex, time-domain samples are then separatedinto two real samples and converted into first and second basebandsignals. The first and second baseband signals are impressed intoquadrature carrier components to form in-phase and quadrature signalcomponents which are combined into an RF signal prior to transmission.For reception, a received RF signal is non-coherently quadraturedemodulated into first and second quadrature baseband signals. First andsecond quadrature sample sequences are generated by sampling thequadrature baseband signals in parallel. The added cyclic prefix andsuffix are discarded, and N complex numbers are generated from the firstand second quadrature (real) sample sequences. N channel-weighted tonesare generated by performing a discrete Fourier transform on the Ncomplex numbers. N phase difference signals are generated which aredemapped into coded information bits according to a predetermined phaseconstellation.

WO 01/35561 A1, describes a multicarrier digital transmission system,wherein an emitter converts a serial input data stream into a set ofparallel substreams and an OQAM modulator receives and supplies eachsubstream to an input of a synthesis filter bank. Synchronizationinput(s) of the filter bank receive an OQAM signal that carries a datasequence. This sequence contains frame, superframe and hyperframesynchronization patterns, and specifies the number of bits allocated toeach subchannel. A receiver includes an analysis filter bank thatdecomposes the multicarrier signal into a set of elementary signals foreach subchannel. A synchronizing processing block receives output(s) ofthe filter bank for synchronization subchannel(s). The block includes afirst cascade of blocks that control receiver sampling times, and asecond cascade of blocks that extract synchronization patterns andsubchannel bit assignment data. Other filter bank outputs are eachcoupled to a cascade subchannel equalizer followed by a data extractorand a parallel-to-serial converter.

U.S. Pat. No. 2001/0026578 A1 discloses a code division multiple access(CDMA) transmitter and receiver having a transmission assembly includinga serial-to-parallel converter for converting transmission data into amodulation input wave composed of real and imaginary parts of a complexnumber, a pseudo random noise (PN) generator for generating real andimaginary parts of a complex spread spectrum code in which real andimaginary parts are uncorrelated and random, a spread spectrum modulatorfor effecting modulation on the transmission data by producing complexnumbers of the modulation input wave from the serial-to-parallelconverter and the complex spread spectrum code from the PN generator, avector combiner for combining real and imaginary part signals outputtedfrom the spread spectrum modulator, a transmit filter for limiting aband of an output signal from the vector combiner. The CDMA transmitterand receiver have a reception assembly including a receive filter forlimiting a band of received signal from the transmission assembly, afractionally tap spacing equalizer for sampling the received signal at arate which is an integral multiple of a chip rate thereof, and awaveform equalizer comprising a tranveral digital filter which uses arecursive least square adaptive algorithm for updating filercoefficients.

WO 01/20919 A1 discloses a method and apparatus for adaptivelycompensating for channel or system variations in which adaptivecompensation is used in the receiver of a digital communication system.The transmitter of the digital communication system includes a precoder.The adaptive receiver compensation mitigates the interference notremoved by the transmitter precoder. In an embodiment, the adaptivecompensation can be performed using an adaptive feedforward filter and afeedback filter in the receiver. The feedback filter output is generatedbased on previous values of estimates of the transmitted precodedsequence. The determined value of the feedback filter coefficients canbe periodically relayed to the transmitter after the value of thecoefficients exceeds a predetermined threshold. Accordingly, thereceiver adaptively and automatically compensates for misadjustments ofthe fixed transmitter precoder with respect to the actual channel at agiven point in time.

Broadband communication systems are characterized by very dispersivechannels. To face this phenomenon, two modulation techniques can beused, namely a single carrier (SC) modulation with broadbandequalization, or a multi carrier modulation with orthogonal frequencydivision multiplexing (OFDM).

The advantages of single carrier modulation over OFDM are that:

-   -   the energy of an individual bit is distributed over the whole        frequency spectrum so that in dispersive channels, when no        adaptive modulation is used, the performance of single carrier        modulation is better than that of OFDM,    -   the peak on average power ratio is lower than that of OFDM,        yielding simpler power amplifier and lower power consumption,    -   the single carrier modulation is less sensible as to carrier        frequency offsets and non-linear distortion than OFDM, and    -   the single carrier modulation has a better bandwidth efficiency,        whereas OFDM requires a cyclic prefix,        whereas the main disadvantages of single carrier modulation over        OFDM are that:    -   when adaptive modulation is used, OFDM yields better        performance, in terms of bit error rate, than single carrier        modulation with linear equalization, and    -   linear and decision feedback equalization of single carrier        modulation is rather complex, whereas for OFDM a simple        equalization technique is available based on a cyclic prefix and        a one-tap per sub-carrier equalizer.

It is therefore an object of the present invention to essentiallyovercome the above mentioned drawbacks of the single carrier modulationwhile essentially keeping the above mentioned advantages of a singlecarrier modulation, and, thus, to increase the performance of a singlecarrier modulation system.

In order to achieve the above and further objects, in accordance with afirst aspect of the present invention, there is provided afrequency-domain decision feedback equalizer device for single carriermodulation, preferably for use in a broadband communication system,including a first section comprising:

-   -   a fast Fourier transforming means for performing a fast Fourier        transformation on a first vector of signals inputted into said        first section, and outputting a second vector of signals,    -   a feed forward equalization means for performing a feed forward        equalization by multiplying each of the components of said        second vector of signals with equalization parameters, and        outputting a third vector of signals, and    -   an inverse fast Fourier transforming means for performing an        inverse fast Fourier transformation on said third vector of        signals, and outputting a fourth vector of signals; and a second        section comprising:    -   a feedback filter means for performing a linear filtering of a        signal derived from an output signal of said second section,    -   an adding means for adding the output signal of said feedback        filter means to the output signal of said first section, and    -   a detector means for receiving the output signal of said adding        means and generating said output signal of said second section        by extracting samples from the output signal of said adding        means.

In accordance with a second aspect of the present invention, there isprovided a frequency-domain decision feedback equalizing method forsingle carrier modulation, preferably for use in a broadbandcommunication system, comprising the steps of: in a first section:

-   -   performing a fast Fourier transformation on a first vector of        signals inputted, and as a result providing a second vector of        signals,    -   performing a feed forward equalization by multiplying each of        the components of said second vector of signals with        equalization parameters, and as a result providing a third        vector of signals,    -   performing an inverse fast Fourier transformation on said third        vector of signals, and as a result providing a fourth vector of        signals, and    -   providing an output signal of said first section on the basis of        said fourth vector of signals; and in a second section:    -   performing a linear feedback filtering of a signal derived from        an output signal of said second section, and providing a        filtered signal,    -   adding said filtered signal to said output signal of said first        section, and providing an added signal, and    -   generating said output signal of said second section by        extracting samples from said added signal.

With the present invention, a new frequency-domain decision feedbackequalization for single carrier modulation is provided, which makes useof a data block transmission format similar to that of the multicarriermodulation with orthogonal frequency division multiplexing with cyclicprefix. Simulations show that the frequency-domain decision feedbackequalization of the present invention yields a capacity very close tothat of OFDM. When no channel loading is considered, the presentinvention performs closely to OFDM for the same averaged frame error ina coded transmission.

In particular, the present invention provides a suitable solution forthe problem of peak on average power ratio, which problem is typical forOFDM systems with even an improved performance over conventional singlecarrier modulation architectures. Moreover, the new architectureaccording to the present invention provides a reliable communicationsystem with a significantly lower complexity than conventionalarchitectures. Namely, the present invention provides a physical-layertransmission architecture which ensures a reliable transmission and hasa similar performance as OFDM and a significantly increased performanceover conventional frequency-domain linear equalization, whereas all theadvantages of single carrier modulation are essentially kept. Finally,since the present invention operates on a per-block basis, errorpropagation through the feedback filter means is limited to one block,which is a further important advantage over the conventional time-domaindecision feedback equalization when operating at low signal-to-noiseratio (SNR) values.

Further advantageous embodiments of the above mentioned equalizingdevice and method are defined in the dependent claims 2 to 11 and 19 to28.

Preferably, for the feed forward equalization, equalization parametersare generated adapted for minimizing the signal-to-noise ratio of thesignal processed, particularly in the output signal of said firstsection. In particular, said equalization parameters are generated bytaking into account a fast Fourier transformation estimation of achannel impulse response of the signal processed, preferably in theoutput signal of said first section.

In a further preferred embodiment, a sequence of signals inputted intosaid first section is serial-to-parallel converted to said first vectorof signals, and said fourth vector of signals is parallel-to-serialconverted to a sequence of output signals of said first section. Inparticular, scalar signals are processed. The signal-to-parallelconverting can be provided to generate said first vector of signalsincluding blocks of a predetermined number of consecutive samples of thesignals inputted into said first section. In particular, scalar signalsare outputted by said parallel-to-serial converting in the first sectionand said linear feedback filtering in said second section. The scalarsignals may be constituted by consecutive blocks of a predeterminednumber of samples, each block being built with a predetermined number ofsamples of each block of said fourth vector of signals.

When extracting samples in said second section, discrete time signalsare usually processed.

In a still further preferred embodiment of the present invention, theoutput signal of said second section is inputted into a feedback inputgenerator means which provides an output signal which is built byconsecutive blocks, each block including first a pseudo noise (PN)sequence and second a predetermined number (M) of samples from saidoutput signal of said section, to said feedback filter means.

In accordance with a third aspect of the present invention, there isprovided a receiver of a communication system using a single carriermodulation, which receiver includes the above described frequency-domaindecision feedback equalizer device.

In accordance with a fourth aspect of the present invention there isprovided a transmitter of a communication system using a single carriermodulation, for transmitting data, comprising a modulating means fororganizing the data in blocks wherein each block is separated by asequence of a predetermined signal.

In accordance with a fifth aspect of the present invention there isprovided a method for transmitting data using a single carriermodulation, comprising a modulating step for organizing the data inblocks wherein each block is separated by a sequence of a predeterminedsignal.

In a further preferred embodiment, said sequence is a pseudo noise (PN)sequence. So, the transmitting comprises a modulation which organizes ina specific way the information, i.e. transmits blocks of signalsseparated by PN sequences of other signals which may be e.g. arepetition of symbol or a repetition of a sequence of symbols.

The above described objects and other aspects of the present inventionwill be better understood by the following description and theaccompanying Figures.

A preferred embodiment of the present invention is described withreference to the drawings in which:

FIG. 1 shows the physical layer of an overall transmission scheme of acommunication system in block diagram;

FIG. 2 the modulator data format; and

FIG. 3 a block diagram of the frequency-domain decision feedbackequalizer provided in the system shown in FIG. 1.

Any communications system includes a physical layer. This layer conveysthe bit stream (electrical impulse, light or radio signals) through anetwork at the electrical and mechanical level. It provides the hardwaremeans of sending and receiving data on a carrier, including definingcables and physical aspects.

A typical operation of a physical layer is described hereinafter byreferring to FIG. 1. At the transmitting side input bit data (IN) arefirst encoded to reduce the error probability and to obtain a signal e(block ENC.). Encoded bits e are mapped into complex symbols taken froma set which is named constellation (block MAP.). A stream of basebanddiscrete-time complex symbols d is obtained. The stream d is modulatedto generate another discrete-time baseband complex signal by a modulator(block MOD.). The baseband signal is converted into an analog signaland, by front end, transmitted on the medium, (block FR. END. Tx).

At the receiving side a reverse operation is performed. A front end(block FR. END. Rx) converts the received continuous-time analog signalinto a discrete-time complex baseband signal r. An equalizer is appliedto generate a discrete-time signal {circumflex over (d)} with symbolstaken from a constellation (block EQUAL.). Demapping is performed toobtain a stream of bits ê (block DEMAP.). Decoding is then applied toobtain the output signal (block DEC.). Further blocks must be includedat the receiving side, like a synchronization block (SYNC) and a channelestimation block (CH. EST) which recover information on the transmissionmedium.

In the following, the modulator (block MOD. in FIG. 1) at thetransmitting side is described in greater detail.

The discrete-time signal d is inputted with a rate 1/T_(d). Thediscrete-time signal s is outputted with a rate (M+L)/T_(d)M, wherein Mis the integer number of data symbol in each transmission block and L isan integer and defines the length of a pseudo noise (PN sequence)wherein L should be greater than the length of the channel impulseresponse.

As shown in FIG. 2, the input data stream is organized into blocks of MAdjacent symbols, and a PN sequence is added at the end of each block,thus obtaining blocks of size M+N which are sent to the output insequence. At the beginning of the operation, an additional PN sequenceis transmitted.

So, in the modulator, data symbols are organized in blocks and eachblock is separated by a fixed sequence of symbol, wherein thistransmission format is denoted as PN-extension. After being formattedaccording to this rule, the symbols are transmitted.

The PN sequence can be also built with symbols not contained in theconstellation, for example a sequence of zeros.

A further essential component is the frequency-domain decision feedbackequalizer (block EQUAL. in FIG. 1) at the receiving side which isdescribed hereinafter in greater detail by referring to FIG. 3.

In the equalizer, the discrete-time complex baseband signal r isprocessed to remove the interference due to the transmission channel.This is done by a two-block structure, including a filtering processoperating efficiently with (inverse) fast Fourier transformation (I)FFT,a decision element and a filtering and cancellation processing.

As shown in FIG. 3, the signal r, which is a scalar signal and outputtedfrom the receiver front end (block FR.END Rx in FIG. 1), is inputtedinto a serial to parallel converter (block S/P in FIG. 3). The S/P blockgenerates blocks of P consecutive samples of the input signal withP=M+L. The output signal q is a vector signal which is inputted into afast Fourier transformation block FFT. The FFT block performs the fastFourier transformation on each input block. The output is a vector ofsignals {R_(n)} with P components. Each signal R_(n),n=0,1, . . . ,P-1is multiplied by G_(FF,n) so as to achieve a feed forward equalization.The result is a vector signal {Y_(n)} with P components which isinputted into an inverse fast Fourier transformation block IFFT. In theIFFT block, an inverse fast Fourier transformation is applied to eachblock of the vector signal {Y_(n)} to give a vector signal {Z_(n)} withP components. This vector signal {Z_(n)} is inputted into a parallelserial converter (block P/S in FIG. 3) which generates a scalar signal ywhich is constituted by consecutive blocks of M samples. Each block isbuilt with M samples of each block of {Z_(n)} with n=0,1, . . . ,M-1.

The equalizer further includes a detector (block DETECTOR in FIG. 3).The input to the detector is a discrete-time signal {tilde over (d)},given by the sum of the output of the P/S block y and the output x of anFB block which is described in greater detail below. The output of thedetector is a discrete time signal {circumflex over (d)}, whose samplesare chosen from the constellation. The chosen constellation symbol has aminimum Euclidean distance from the corresponding input sample.

Further, there is provided a feedback input generator (block FEEDBACKINPUT GENERATOR in FIG. 3) which receives the scalar signal {circumflexover (d)} and outputs a signal built by consecutive blocks, eachincluding first the PN sequence and then M samples of the output of thedetector.

The output signal from the feedback inputted generator is inputted intothe FB block which outputs the scalar signal x. The FB block performs alinear filtering of the input signal, and the impulse response of thefiltering is given by {g_(FB,n)} By such filtering, the equalization isadapted to the particular transmission channel condition under which thetransmission in performed.

The above described equalizer must be changed according to theparticular conditions of the transmission medium. In particular, thefront ends and the transmission medium can be modeled as cascade of afinite impulse response filter (the transmission filter) and additiveGaussian noise. Assuming that the transmission channel frequencyresponse is known at the receiving side, the equalizer parameters arecomputed with the aim of a proper work of the equalizer and inparticular minimizing the power of the noise plus distortion at theinput of the detector (block DETECTOR in FIG. 3) as follows:

-   -   Parameters: M, L, P=M+L, N_(FB).    -   Input: a sequence P complex samples {H_(p)} which are the        estimated P-points FFT of the channel impulse response.    -   Output: equalizer parameters {G_(FF,n)} and {g_(FB,n)}.    -   Algorithm:

-   1. Let g_(FB)=[g_(FB,1),g_(FB,2), . . . g_(FB,NFB]) ^(T), (where    (□)^(T) denotes the transpose).

-   2. Build the matrix (A) with entries

${\lbrack A\rbrack_{m,l} = {\sum\limits_{n = 0}^{P - 1}\frac{{\mathbb{e}}^{{- {j2\pi}}\frac{\;{n{({l - m})}}}{P}}}{{H_{n}}^{2}}}},{1 \leq m},{l \leq N_{FB}},$

-   3. Build the column vector (b) with entries

${\lbrack b\rbrack_{m} = {\sum\limits_{n = 0}^{P - 1}\frac{{\mathbb{e}}^{{j2\pi}\;\frac{nm}{P}}}{{H_{n}}^{2}}}},{1 \leq m \leq N_{FB}},$

-   4. Solve the linear system of N_(FB) equations with N_(FB) unknowns    A g_(FB)=b.-   5. Compute the feedforward filter coefficients as follows:

${G_{{FF},n} = {\frac{1}{H_{n}}\left( {1 - {\sum\limits_{l = 1}^{N_{FB}}{g_{{FB},l}{\mathbb{e}}^{{- {j2\pi}}\;\frac{\ln}{P}}}}} \right)}},{n = 0},1,\ldots\mspace{14mu},{P - 1},$Other embodiments: If the signal to noise power ratio Γ is known at thereceiver, then

${\lbrack A\rbrack_{m,l} = {\sum\limits_{n = 0}^{P - 1}\frac{{\mathbb{e}}^{{- {j2\pi}}\;\frac{n{({l - m})}}{P}}}{{H_{n}}^{2} + \Gamma}}},{1 \leq m},{l \leq N_{FB}},\mspace{14mu}{{{and}\lbrack b\rbrack}_{m} = {\sum\limits_{n = 0}^{P - 1}\frac{{\mathbb{e}}^{{j2\pi}\;\frac{nm}{P}}}{{H_{n}}^{2} + \Gamma}}},{1 \leq m \leq {N_{FB}.}}$The above described system can be applied to all broadband transmissionsystems; these include a wired transmission (all xDSL systems) and awireless transmission (Hiperlan and IEEE802. 11 standard and DAB/DVB).

The mentioned system substitutes the OFDM modulator/demodulator and theequalizer. Transmission format must be changed from the cyclic-extendedtransmission to the PN-extended transmission.

In summary, the above described equalizer is an alternative in thesystems where OFDM is used or has been proposed for application. Theabove described device is a physical layer component. In the ISO-OSIabstraction of a communication system, the medium access control (MAC)layer guarantees the quality of the transmission for example by errorcorrecting codes. The above described device provides this MAC levelwith a stream of symbols having the same rate of an equivalent OFDM butwith a bit error rate equal or even lower than OFDM. Furthermore, theabove described system is more resilient to frequency offset phenomenaand it requires a simpler power amplifier, since the peak to averagedpower ratio is lower than OFDM. Moreover, when compared to singlecarrier equalizers it is both simpler and more efficient.

Although the invention is described above with reference to an exampleshown in the attached drawings, it is apparent that the invention is notrestricted to it, but can vary in many ways within the scope disclosedin the attached claims.

1. A frequency-domain decision feedback equalizer device for singlecarrier modulation comprising: a first section configured to generate anoutput signal and including a fast Fourier transformation circuitconfigured to perform a fast Fourier transformation on a first vector ofsignals inputted into said first section, and outputting a second vectorof signals, a feed forward equalizer circuit configured and coupled toperform feed forward equalization by multiplying each of the componentsof said second vector of signals with equalization parameters, andoutputting a third vector of signals, and an inverse fast Fouriertransformation circuit configured and coupled to perform an inverse fastFourier transformation on said third vector of signals, and outputting afourth vector of signals; and a second section including a feedbackfilter circuit configured and coupled to perform linear filtering of asignal derived from an output signal of said second section, an addercircuit coupled to add the output signal of said feedback filter circuitto the output signal of said first section, and a detector circuitconfigured and coupled to receive the output signal of said addercircuit and generate said output signal of said second section byextracting samples from the output signal of said adding means.
 2. Thedevice according to claim 1, wherein said feed forward equalizer circuitgenerates equalization parameters adapted for minimizing thesignal-to-noise ratio of the signal processed in the frequency-domaindecision feedback equalizer device, preferably in the output signal ofsaid first section.
 3. The device according to claim 1, wherein saidfeed forward equalizer circuit generates equalization parameters bytaking into account a fast Fourier transformation estimation of achannel impulse response of the signal processed in the frequency-domaindecision feedback equalizer device, preferably in the output signal ofsaid first section.
 4. The device according to claim 1, wherein saidfirst section further comprises: a serial to parallel converter circuitcoupled to convert a sequence of signals input into said first sectionto said first vector of signals, and a parallel to serial convertercircuit coupled to convert said fourth vector of signals to a sequenceof output signals of said first section.
 5. The device according toclaim 4, wherein said serial to parallel converter circuit is adapted toreceive scalar signals.
 6. The device according to claim 4, wherein saidserial to parallel converter circuit generates said first vector ofsignals including blocks of a predetermined number of consecutivesamples of the signals input into said first section.
 7. The deviceaccording to claim 4, wherein said parallel to serial converter circuitand said feedback filter means are configured to output scalar signals.8. The device according to claim 6, wherein said parallel to serialconverter circuit is configured to output a scalar signal which isconstituted by consecutive blocks of a predetermined number of samples,each block being built with the predetermined number of samples of eachblock of said fourth vector of signals.
 9. The device according to claim1, wherein said detector circuit is configured to receive and outputdiscrete time signals.
 10. The device according to claim 1, wherein saiddetector circuit is configured to generate said output signal of thesecond section.
 11. The device according to claim 1, wherein said secondsection further comprises a feedback input generator for receiving saidoutput signal of said second section and providing an output signalwhich is built by consecutive blocks, each block including first apseudo noise sequence and second a predetermined number (M) of samplesfrom said output signal of said section, to said feedback filtercircuit.
 12. The device according to claim 1, further including areceiver of a communication system using a single carrier modulation,wherein said receiver includes said first and second sections of thefrequency-domain decision feedback equalizer device.
 13. The deviceaccording to claim 1, further including a communication system includinga transmitter using a single carrier modulation, for transmitting data,comprising a modulator circuit configured to organize the data in blockswherein each block is separated by a sequence of a predetermined signaland a receiver of a communication system using a single carriermodulation, wherein said receiver includes said first and secondsections of the frequency-domain decision feedback equalizer device. 14.A frequency-domain decision feedback equalizing method for singlecarrier modulation, preferably for use in a broadband communicationsystem, comprising the steps of: in a first section providing an outputsignal of said first section by: performing a fast Fouriertransformation on a first vector of signals inputted, and as a resultproviding a second vector of signals, performing a feed forwardequalization by multiplying each of the components of said second vectorof signals with equalization parameters, and as a result providing athird vector of signals, performing an inverse fast Fouriertransformation on said third vector of signals, and as a resultproviding a fourth vector of signals, and providing an output signal ofsaid first section on the basis of said fourth vector of signals; and ina second section: performing a linear feedback filtering of a signalderived from an output signal of said second section, and providing afiltered signal, adding said filtered signal to said output signal ofsaid first section, and providing an added signal, and generating saidoutput signal of said second section by extracting samples from saidadded signal.
 15. The method according to claim 14, wherein in said feedforward equalization step equalization parameters are generated adaptedfor minimizing the signal-to-noise ratio of the signal processed,preferably in the output signal of said first section.
 16. The methodaccording to claim 14, wherein in said feed forward equalization stepequalization parameters are generated by taking into account a fastFourier transformation estimation of a channel impulse response of thesignal processed, preferably in the output signal of said first section.17. The method according to claim 14, comprising in said first sectionthe further steps of: serial to parallel converting a sequence ofsignals inputted into said first section to said first vector ofsignals, and parallel to serial converting said fourth vector of signalsto a sequence of output signals of said first section.
 18. The methodaccording to claim 17, wherein said serial to parallel converting stepis provided to process scalar signals.
 19. The method according to claim17, wherein said serial to parallel converting step is provided togenerate said first vector of signals including blocks of apredetermined number of consecutive samples of the signals inputted intosaid first section.
 20. The method according to claim 17, wherein saidparallel to serial converting step and said linear feedback filteringstep are provided to output scalar signals.
 21. The method according toclaim 19, wherein said parallel to serial converting step is provided tooutput a scalar signal which is constituted by consecutive blocks of apredetermined number of samples, each block being built with thepredetermined number of samples of each block of said fourth vector ofsignals.
 22. The method according to claim 14, wherein said extractingstep in said second section is adapted to process discrete time signals.23. The method according to claim 14, wherein said extracting step insaid second section is provided to generate said output signal.
 24. Themethod according to claim 14, comprising in said second section afeedback input generating step for processing said output signal of saidsecond section and providing an output signal which is built byconsecutive blocks, each block including first a pseudo noise sequenceand second a predetermined number of samples from said output signal ofsaid section, to said feedback filter means.
 25. A frequency-domaindecision feedback equalizer device for single carrier modulation, thedevice comprising: a first section including a fast Fourier transformerto perform a fast Fourier transformation on a first vector of singlecarrier signals inputted into said first section, and to output thetransformed signals as a second vector of signals, a feed forwardequalizer to perform a feed forward equalization by generatingequalization parameters using a fast Fourier transformation estimationof a channel impulse response of an output single carrier signal of saidfirst section, multiplying each of the components of said second vectorof signals with the generated equalization parameters to reduce thesignal-noise ratio of the signals, and outputting the multiplied signalsas a third vector of signals, and an inverse fast Fourier transformer toperform an inverse fast Fourier transformation on said third vector ofsignals, and to output the inversely transformed signals as a fourthvector of signals that is the output signal of the first section; and asecond section including a feedback filter to linearly filter a signalderived from an output signal of said second section, an adder to addthe output signal of said feedback filter to the output signal of saidfirst section, and a detector to receive the output signal of said adderand generate said output signal of said second section by extractingsamples from the output signal of said adder.
 26. The device accordingto claim 11, wherein: the detector circuit is configured to receive andoutput discrete time signals selected from a constellation consisting ofa set of symbols; and wherein the pseudo noise sequence is constructedfrom symbols selected from the constellation.
 27. The device accordingto claim 11, wherein: the detector circuit is configured to receive andoutput discrete time signals selected from a first constellationconsisting of a set of symbols; and wherein the pseudo noise sequence isa selected sequence constructed from symbols selected from a secondconstellation exclusive to the first constellation.
 28. The deviceaccording to claim 11, wherein: the detector circuit is configured tooutput scalar signals including a number of samples consisting of thepredetermined number (M) of consecutive samples; and the feedback inputgenerator is configured to output the pseudo noise sequence appended tothe scalar signal.